Hi! I’m Mario Drumond (a.k.a. Mario Paulo Drumond Lages de Oliveira), a last-year PhD Student at Computer and Communication Sciences, École Polytechnique Fédérale de Lausanne (EPFL).
I am working in the Parallel Systems Architecture (PARSA) group and advised by Prof. Babak Falsafi.
I am interested in computer architecture, near memory computing, and reconfigurable computing.
- Ahmet Yüzügüler, Firat Celik, Mario Drumond, Babak Falsafi, Pascal Frossard. Analog Neural Networks With Deep-Submicrometer Nonlinear Synapses. IEEE Micro 39 2019
- Mario Drumond, Tao Lin, Martin Jaggi, and Babak Falsafi, Training DNNs with Hybrid Block Floating Point. NeurIPS 2018
- Mohammad Sadrosadati, Amirhossein Mirhosseini, Seyed Borna Ehsani, Hamid Sarbazi-Azad, Mario Drumond, Babak Falsafi, Rachata Ausavarungnirun, Onur Mutlu. LTRF: Enabling High-Capacity Register Files for GPUs via Hardware/Software Cooperative Register Prefetching. ASPLOS 2018
- Mario Drumond, Alexandros Daglis, Nooshin Mirzadeh, Dmitrii Ustiugov, Javier Picorel, Babak Falsafi, Boris Grot, Dionisios Pnevmatikatos. The Mondrian Data Engine. ISCA 2017
- Vinay Gangadhar, Raghu Balasubramanian, Mario Drumond, Ziliang Guo, Jai Menon, Cherin Joseph, Robin Prakash, Sharath Prasad, Pradip Vallathol, Karu Sankaralingam. MIAOW: An open source GPGPU. Hot Chips 2015
Intern at Microsoft Research Cambridge, Summer 2017
Worked on the Project Brainwave, investigating neural network training in Microsoft’s FPGA-accelerated deep learning infrastructure.
Intern at Microsoft Research Redmond, Summer 2015
Worked on the Catapult project, implementing direct communication between the Catapult FPGAs and SSD disks.
Hardware Design Engineer at Ivision Sistemas de Imagem e Visão, 06/2013 - 08/2014
Developed FPGA based intelligent cameras for Industry
- Ph.D. Computer Science, School of Computer and Communication Sciences,
Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland (2014-ongoing)
- B.Sc. Electrical Engineering, Department of Electrical Engineering,
Universidade Federal de Minas Gerais (UFMG), Belo Horizonte, Brazil (2008-2014)
- Vocational, Computer Sicence, Centro Federal de Educação Tecnológica de Minas Gerais (2005-2008)
- Advanced Multiprocessor Architecture, EPFL, Fall 2017, 2019
- Object-Oriented Programming Laboratory, EPFL, Spring 2017
- Real Time Networks, EPFL, Spring 2016
- Introduction to Multiprocessor Architecture, EPFL, Fall 2015-2016, 2018
- Concurrency, EPFL, Spring 2015